Details

Project TitleDevice Under Test (DUT) Continuity Test with only Digital Input/Output Structures
Track CodeCRANE-103032
Short Description

The U.S. Navy seeks a partner for licensing and collaboration on a device under test (DUT) testing system for determining short, open, and good connections using digital input and output (IO) structures in a DUT continuity test through the combined methods of using resistance-capacitance delay, time domain reflectometry, and forcing voltage on to a single IO pin of the DUT while measuring voltage on the remaining IO pins.

AbstractNone
 
TagsCrane, electrical engineering, Materials and Manufacturing, testing
 
Posted DateJul 5, 2017 2:53 PM

Researcher

Name
Adam Duncan
Matthew Gadlage

Device Under Test (DUT) Continuity Test with only Digital Input/Output Structures

Background

Typical device under test (DUT) testing systems rely on analog voltage measurements and adjustable current sources. These systems are limited and fall short of meeting the needs of having a digital system in two ways. First, the current sourcing equipment and analog voltage measurement equipment needs to be built into the test system to complete the measurement. Second, non-standard input and output (IO) structures that do not include an electrostatic discharge diode are not compatible.

Technology Summary

NSWC Crane has developed and patented a device under test (DUT) testing system for determining short, open, and good connections using digital input and output (IO) structures in a DUT continuity test through the combined methods of using resistance-capacitance delay, time domain reflectometry, and forcing voltage on to a single IO pin of the DUT while measuring voltage on the remaining IO pins. The system is a computer implemented method for determining electrical connections using digital IO structures without the application of current source and obtaining a precise voltage measurement in the DUT where one short circuit check comprises forcing voltage on a single pin wile measuring voltage on remaining pins and open circuit check comprises of either a) measuring resistance-capacitance delay on DUIT IO or b) using time domain reflectometry or a combination of both.

Advantages

  • Reduced cost
  • Safely determines whether the DUT is inserted correctly
  • No need for an adjustable current source or analog voltage measurement

Potential Applications

  • Automated test equipment
  • Self-test for hardware

Stage of Development

Prototyped

Web Links

Contact Information

For more information, please contact the Office of Technology Commercialization at otcip@prf.org.

Files

File Name Description
CRANE-103032_9,753,445 None Download
Tech Profile_103032 None Download
CRANE-103032_9,684,025 None Download

Intellectual Property

Patent Number Issue Date Type Country of Filing
9,753,445 Sep 5, 2017 Divisional United States
9,684,025 Jun 20, 2017 Utility United States